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STI1010
Single-chip worldwide iDTV processor
Data Brief
Features

32-Bit RISC ST40 CPU, 266 MHz, 480 MIPs DDR2 unified memory interface, 250 MHz clock Transport stream demultiplexer with DES, DVB and Multi2 descrambler CableCard and DVB-CI interface MP@ML and MP@HL MPEG2 video decoder 24-bit audio DSP core, MPEG1(layers 1,2,3), MPEG2, MPEG2-AAC, Dolby(R) Digital, MP3 decoder Analog video input: CVBS, SVHS(Y/C), Component (from SD up to HD 720p, 1080i, 1080p) PC input, analog RGB up to UXGA/60 Hz (162 MHz sampling frequency) 24-bit digital video input, up to 1080p and UXGA/60 Hz

PC H/V syncs DATA(32-bit) ADDR DATA(16-bit) ADDR
HDMI/HDCP input, RGB/YCrCb up to 1080p, UXGA/60 Hz support, stereo and 5.1 multi-channel audio. Compliant with HDMI 1.3, DVI 1.0, HDCP v1.3 USB2.0 high speed interface (480 Mbits/s) High definition video processor Multi-standard color decoder (PAL/SECAM/NTSC), with 3D comb filtering in NTSC and PAL, Luma and Chroma spatio-temporal (3D) noise reduction Double video pipe for Picture In Picture (PIP) display 2D graphic accelerator and enhanced True color on screen display. Bitmap OSD generated at panel resolution Video and graphic composition for Picture And Text (PAT), Picture And Graphic (PAG), mosaic Exhaustive set of peripherals for DTV chassis control Dual LVDS output for flat panel display support, up to full HD 1920 x 1080p resolution. Package FPBGA 27x27, 700 balls, pitch 0.8 mm
24 MHz XTAL

CVBS1 G1/Y1 B1/Pb1 R1/C1/Pr1 FB
PC_B/Pb2 PC_G/Y2
CEC/HPD DDC HDMI
USB 2.0
MUX D1/HD HD/D1 in HD H/V syncs 24/16/8-bit digital in. ADC ADC ADC ADC Digital Decoder 3D Comb 3D-NR HDMI/ HDCP input
PIOs System USB2.0 Clock ST40 EMI HOST Mgt CPU External Chassis Control JTAG 266 MHz, VTG Memory Advance Interface 480 MIPs (IT, WDG, RTC, ADC, IR, main 16K-I User NAND/NOR PWM, UARTs, I2C...) and aux DDR2-500 32K-D Flash Debug LMI Local Memory Interface
STI1010
ST Bus On-Chip Interconnect
MPEG-2 Video Decoder (SD / HD) TSin
GFx 2D GFx accelerator planes (x2)
Main Video pipe FMD/DEi H/V SRC IQI
Secondary* Video pipe DEi-light H/V SRC Aux Compo.
Aux Video* Text/CC VBI denc
TS Processing CA Interfaces
Audio Decoder (DSP) MPEG1, MPEG2, MP3 Dolby Digital, AAC
Main Compositor
UART
Reset
Gamma, Color warping, PCE Dual LVDS transmitter
DAC DAC DAC
S/PDIF out IS outputs
LVDS out
CA out
CA in
IS_ in
December 2007
Rev 1
CVBS/YC
PWM GP I/O Interrupts ADC input DENC
PC_R/Pr2
Test Port
IC
1/5
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For further information contact your local STMicroelectronics sales office.
Description
STI1010
1
Description
The STI1010 is a highly-integrated, high-performance system-on-chip iDTV processor compliant with worldwide digital TV standards such as ATSC (US), DVB (Europe), ARIB (Japan), DMB-TH (China) and PAL/SECAM/NTSC analog TV standards. The STI1010 provides a cost-optimized solution for iDTV (basic TV platform DTV150), with a minimum number of external components, 32-bit unified DDR2 memory interface for CPU, OSD, video. The STi1011 version permits low-cost iDTV implementation with a single 16-bit DDR2 memory interface. The STI1010 is able to receive TV signals from either analog or digital terrestrial transmission, cable tuner, satellite tuner, external audio/video sources such as DVD players, STB, PVR, PC, and so on. The STI1010 allows low-cost implementation of matrixed display integrated Digital TV, including HDTV display: LCD display, Plasma Display Panel (PDP), Rear Projection TV (RPTV) and Digital Light Processing (DLP) RPTV up to 1920 x 1080p resolution. The STI1010 provides Dual LVDS output, which can drive 18-bit, 24-bit or 30-bit flat panels, up to Full HD definition. Video output has programmable Line and Pixel output formats (1366 x 768 and 1920 x 1080 resolution included). The STI1010 also provides CVBS and YC output from a digital PAL/SECAM/NTSC encoder. The STI1010 supports the decoding and processing of Standard Definition (SD) and High Definition (HD), analog and digital video sources, and the decoding and processing of digital audio from stereo up to 5.1 audio channels. The STI1010 provides high performance video processing as follows:

3D Comb filter for NTSC and PAL standards 3D Noise reduction Automatic film mode detection: static picture, movie, video, 3:2, 2:2 pull-down detection and recovery. Automatic letter box detection, interlaced/progressive modes and scene change detection.

3D motion adaptive pixel-based advanced deinterlacing with diagonal compensation: ST 3D contour sensitive DeinterlacerTM (CSDi) Flexible H and V scaling Image quality improvement: 10-bit resolution (up to 12-bit processing), automatic contrast enhancement, automatic color enhancement, 2D LTI, CTI, H and V peaking Picture In Picture (PIP) display
The STI1010 supports high quality bitmap graphic display, Multi-plane On-Screen Display (OSD) generated at display panel resolution. The STI1010 product permits the development of Integrated Digital TV (iDTV) applications with services such as US Closed Caption, US Vchip, Teletext, DVB-subtitles, EPG, and middleware such as MHEG-5 and MHP. It supports conditional access for US (open cable CableCARD), Europe (DVB-CI) and Japan (ARIB Conditional access).
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STI1010 Figure 1. US basic FPD iDTV
Serial link (UART) IR Keyboard USB 2.0
Description
CableCard Interface FLASH TUNER STV037x SIF CVBS
g) din ea gr alo (an
DDR2
PIF and SIF
TSin
HDMI input
STi101x
EPROM
LVDS link
VGA RGB L/R Y/Pr/Pb RGB/YPrPb CVBS CVBS/YC in CVBS,Y/C out STV6415 SIF SPDIF out IS (x4) STMA340 IC EPROM
Y/C L/R CVBS CVBS/YC CVBS/YC Analog Inputs
Video Matrix
Audio Matrix
L,R inputs Y/C L/R CVBS CVBS/YC L,R output
STV83x8
Analog Outputs
SPDIF out
Figure 2.
European basic FPD iDTV
Serial link IR (UART) TUNER STV036x FLASH Common Interface
din g)
Keyboard
USB 2.0
PIF and SIF
SIF CVBS TSin
n (a
g alo
a re
DDR2
HDMI input
EPROM VGA RGB
STi101x
LVDS link
Y/Pr/Pb CVBS Video Matrix STV6402 CVBS/YC RGB/YPrPb CVBS,Y/C out IS (x4)
IC EPROM
SPDIF out L,R inputs Audio Matrix
L,R output
STV83x7
Analog Sources
SPDIF out
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Revision history Package: The STI1010 uses a FPBGA 27 x 27, 700 balls, 4L package. Table 1. Package information
FPBGA 27 x 27 0.8 700 32 x 32 4 Unit mm mm balls balls layers
STI1010
Package Type body size ball pitch ball count ball matrix substrate
2
Revision history
Table 2.
Date 18-Dec-2007
Document revision history
Revision 1 Initial release. Changes
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STI1010
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